As integration density of semiconductor memory devices (e.g., DRAMs) increases, circuit components such as transistors are formed closer to each other and reliability of the devices decreases unless effective isolation techniques for separating devices such as MOS transistors next to each other are employed. Trench isolation techniques which can form an isolation region having a narrow width are widely used in the manufacture of highly integrated semiconductor memory devices. Other conventional isolation methods include local oxidation of silicon (LOCOS).
However, as integration density of the semiconductor memory device increases, the width of the trench in which the isolation layer is formed is also diminished. Therefore, an effective method of filling the trench without a void or a seam is needed.
Silicon oxide is commonly used as trench filing material. Various methods for forming an oxide layer, which has relatively good gap filling properties, are proposed for filling a trench having high aspect ratio. One of the methods by use of a silicon oxide composed of TEOS(Tetra Ethyl Ortho Silicate)-USG (Undoped Silicate Glass) or a silicon oxide composed of HDP (High Density Plasma)-CVD (Chemical Vapor Deposition) is suggested. However, such a method is not suitable for filling a trench having a very high aspect ratio, e.g., a width of about 1200 Å and a depth of about 6000 Å.
Another known method for filling a trench is using a Spin-on-Glass (SOG) layer. SOG is a liquid state or a sol state in the first time, therefore, gap filling characteristics are excellent and step differences are reduced. But it is difficult for the SOG layer to change into a perfect oxide silicon layer, even though a recovery process for changing the SOG layer into an oxide silicon layer is performed through successive heat treatment. A disadvantage of use of a SOG layer is that it is easily removed during an etching process or a cleaning process, because the SOG layer does not have a compact structure. In the case of an organic SOG layer, heat treatment is difficult, and organic components which remain may affect semiconductor device operations. Also, shrinkage may occur after coating. Consequently, a crack may form in the SOG layer during heat treatment after forming the layer, and a stress difference is generated by thermal expansion in accordance with partial recovery states, resulting in a device which may be prone to crack or become defective.
Accordingly, a need exists for a semiconductor device having a trench isolation layer and a fabrication method to reduce defects of the SOG layer.